Cogitan
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Fluxus-Q

Analytic engine

Frequency-collision yield

The fraction of fabricated chips, under a given frequency spread, with no frequency collision — and which rules and which qubits drive the losses.

For: Teams laying out fixed-frequency transmon processors who need a frequency plan and a fabrication-spread budget.

39.6%

of ibm_brisbane's real gates violate rule 4

57 of 144 · why rule 4 is off by default

Status. Analytic Monte Carlo, not a surrogate. One discrepancy with the reference model is open.

Engine. Analytic Monte Carlo of published collision rules — not a surrogate.

Reference. The collision rules of Hertzberg et al.; rule 4 checked against measured frequencies and real gate sets of two IBM Eagle r3 processors from public calibration data.

API

Endpoints

POST/v1/fluxus/yld

collision-free yield and mean violations per rule

POST/v1/fluxus/yld/detail

plus per-qubit collision rate

POST/v1/fluxus/yld/curve

yield versus frequency spread

POST/v1/fluxus/yld/graph

same, over your own qubit graph

Base URL https://api.cogitan.ai, bearer key from an approved account. Read GET /v1/fluxus/capabilities first: it states the same fidelity, validation, envelope and refusal conditions as this page. Access model.

Inputs

What you send

n_qubits
1 – 2,000
lattice
heavy_hex | square
target_f_ghz
GHz — optional frequency plan
sigma_f_mhz
MHz — fabrication frequency spread
anharm_mhz
MHz
n_trials
subject to the work budget
frequencies_ghz, edges
graph route only

Outputs

What comes back

yield_fraction
collision_counts
mean violations per chip, per rule
per_qubit_rate
detail and graph routes
points
[σ_f, yield] pairs, curve route

Validation

Measured against what, and how

Reference. The collision rules of Hertzberg et al.; rule 4 checked against measured frequencies and real gate sets of two IBM Eagle r3 processors from public calibration data.

Split. Not applicable — an analytic Monte Carlo, not a learned model.

Rule 4 on ibm_brisbane's real gates

57 / 144 (39.6%)

Collisions on brisbane, undirected vs directed

27 vs 4

reading the coupling map as undirected inflates violations

Yield at 127 qubits, σ_f = 14 MHz

4.3% vs 8% reference

pessimistic; discrepancy open

Envelope

Where the answer is trusted

work budget
60 reference-seconds per request
curve
≤ 64 σ_f values

Refusals

When you get no number

  • A request over the work budget is refused up front with HTTP 422, stating the trial count that would fit at that chip size.

Known limits

What it does not do

  • Rule 4 (the cross-resonance straddling window) is computed and reported but does not count toward yield, by default since 2026-09-03, because measured silicon falsified it as a fatal condition.
  • Against the reference model's own setup it is pessimistic: 4.3% collision-free yield at 127 qubits where the published value is 8%. Three explanations are excluded; the cause is open.
  • There is no measured wafer yield behind any of this. Chips that did not ship are not observable.

Every figure on this page compares against a simulator or a published device measurement. None of it is a prediction of your fabricated hardware. For one certification-grade answer, run the full reference; this is for screening many designs cheaply and spending solver time on the survivors.