Cogitan

Fluxus · the surrogate design suite

One engine.
Two products.

Fluxus is the surrogate engine for superconducting hardware design. It ships as two products — Fluxus-Q for qubit chips and Fluxus-S for SFQ logic — on a shared verification kernel that puts a calibrated confidence bound and a full-fidelity check behind every prediction. Buy either. Buy both for co-design.

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Qubit · cQED

Fluxus-Q

In build · Phase 0

Design qubit chips.

Layout → eigenmodes, Hamiltonian, inverse design, and frequency-collision yield. The ~1-hour electromagnetic solve as a sub-second function with calibrated error bars.

QEMHAMINVYLD

For transmon / cQED chip designers.

Explore Fluxus-Q

SFQ logic

Fluxus-S

Deployed today

Verify SFQ logic.

Margin, timing, yield, and design-rule verification for RSFQ single-flux-quantum cells — layout-native and JoSIM-free, measured against JoSIM on a grouped held-out split, targeting MIT-LL SFQ5ee+.

marginstimingyieldDRV

For RSFQ / superconducting-digital designers.

Explore Fluxus-S

The shared engine

What both products stand on.

Superconducting hardware splits into two worlds — analog cQED qubits and classical SFQ logic — that almost never share a tool. Fluxus puts both on one engine: typed functions, a verification kernel, and a process registry. Swap the ground truth — closed-form physics, Palace/HFSS, JoSIM — and it changes the data the models train on, not the interface you work in.

Calibrated trust
Split-conformal prediction intervals on every value, source labels telling you which backend answered, and abstention when a surrogate leaves its trained envelope. The model tells you when not to trust it.
Verify loop
Every surrogate answer carries a full-fidelity check — Palace for EM, JoSIM for SFQ — one keystroke away, with the delta highlighted. The engine owns the loop, not the final word.
Per-process calibration
Both products retarget to your fab node from a fixed-scope engagement: we train on your reference simulator and hand you the validated endpoint with its validity report.

Co-design · the bundle

Both halves, one design.

The two products are independently useful — but owned together they unlock what neither can alone. Co-design (COD) simulates SFQ control logic against qubit Hamiltonians: flux crosstalk, timing, drive fidelity, and heat load at 10 mK. It is the direction the field is moving — SFQ-controlled qubits at the cold stage — and Cogitan owns the only deployed SFQ surrogate to anchor it.

Fluxus-Q

the qubit half — Hamiltonians, yield

Fluxus-S

the SFQ half — deployed, validated

COD

co-design — needs both. Planned

Before the solve · Corpus

The cheapest solve is the one you skip.

Fluxus makes the expensive solve fast. Corpus checks whether you needed it — scanning a design against a rule database and returning violations and near-boundary warnings in seconds. The two meet in the engine room: Corpus’s cQED rules are verified against Fluxus’s own FEM and analytic solvers, never against a surrogate.

Explore Corpus

Designing superconducting hardware?
Let's talk.

Qubit chips, SFQ logic, or both for co-design — if your design loop is bottlenecked on simulation, we'd like to understand it and train Fluxus on your process.

Get in touch